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IDT74LVCH32245A 3.3V CMOS 32-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS
INDUSTRIAL TEMPERATURE RANGE
IDT74LVCH32245A 3.3V CMOS 32-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS, 5 VOLT TOLERANT I/O, BUS-HOLD
* Typical tSK(o) (Output Skew) < 250ps * ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0) * VCC = 3.3V 0.3V, Normal Range * VCC = 2.7V to 3.6V, Extended Range * CMOS power levels (0.4 W typ. static) * All inputs, outputs, and I/O are 5V tolerant * Supports hot insertion * Available in 96-ball LFBGA package
FEATURES:
DESCRIPTION:
DRIVE FEATURES:
* Balanced Output Drivers: 24mA * Reduced system switching noise
APPLICATIONS:
This 32-bit bus transceiver is built using advanced dual metal CMOS technology. This high-speed, low power transceiver is ideal for asynchronous communication between two busses (A and B). The Direction and Output Enable controls are designed to operate the device as either four independent 8-bit transceivers or one 32-bit transceiver. The direction control pins (DIR) control the direction of data flow. The output enable pins (OE) override the direction control and disable both ports. All inputs are designed with hysteresis for improved noise margin. All pins can be driven from either 3.3V or 5V devices. This feature allows the use of this device as a translator in a mixed 3.3V/5V supply system. The LVCH32245A has been designed with a 24mA output driver. This driver is capable of driving a moderate to heavy load while maintaining speed performance The LVCH32245A has "bus-hold" which retains the inputs' last state whenever the input goes to a high impedance. This prevents floating inputs and eliminates the need for pull-up/down resistors.
* 5V and 3.3V mixed voltage systems * Data communication and telecommunication systems
FUNCTIONAL BLOCK DIAGRAM
A3 A4 J3 J4
1DIR
3DIR 1OE
3OE 3A1
J5 J2
1A1
A5 A2
1B1
3B1
TO SEVEN OTHER CHANNNELS
TO SEVEN OTHER CHANNNELS
2DIR
H3 H4
4DIR 2OE
T3 T4
4OE 4A1
N5 N2
2A1
E5 E2
2B1
4B1
TO SEVEN OTHER CHANNNELS
TO SEVEN OTHER CHANNNELS
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
INDUSTRIAL TEMPERATURE RANGE
1
(c)2000 Integrated Device Technology, Inc.
FEBRUARY 2000
DSC-4767/1
IDT74LVCH32245A 3.3V CMOS 32-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS
INDUSTRIAL TEMPERATURE RANGE
PIN CONFIGURATION
6
1A2
1A4
1A6
1A8
2A2
2A4
2A6
2A7
3A2
3A4
3A6
3A8
4A2
4A4
4A6
4A7
5
1A1
1A3
1A5
1A7
2A1
2A3
2A5
2A8
3A1
3A3
3A5
3A7
4A1
4A3
4A5
4A8
4 1OE
GND GND
VCC VCC
GND
GND
VCC VCC
GND GND
2OE
3OE
GND GND
3B3
VCC VCC
GND GND
GND GND
VCC VCC
4B3
GND GND
4OE
3 1DIR
GND
1B7
GND
2DIR
3DIR
4DIR
2
1B1
1B3
1B5
2B1
2B3
2B5
2B8
3B1
3B5
3B7
4B1
4B5
4B8
1
1B2 A
1B4 B
1B6 C
1B8 D
2B2 E
2B4 F
2B6 G
2B7 H
3B2 J
3B4 K
3B6 L
3B8 M
4B2 N
4B4 P
4B6 R
4B7 T
LFBGA TOPVIEW
96 BALL LFBGA PACKAGE ATTRIBUTES
1.5 mm Max. 1.4 mm Nom. 1.3 mm Min.
0.8mm
6
5 4 3 2 1 A B C D E F G H J K L M N P R T
TOP VIEW
A 1 2 3
B
C
D
E
F
G
H
J
K
L
M
N
P
R
T
5.5mm
4 5 6
13.5mm
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IDT74LVCH32245A 3.3V CMOS 32-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS
INDUSTRIAL TEMPERATURE RANGE
ABSOLUTE MAXIMUM RATINGS(1)
Symbol Description Max VTERM TSTG IOUT IIK IOK ICC ISS Terminal Voltage with Respect to GND Storage Temperature DC Output Current Continuous Clamp Current, VI < 0 or VO < 0 Continuous Current through each VCC or GND -0.5 to +6.5 -65 to +150 -50 to +50 -50 100
Unit V C mA mA mA
CAPACITANCE (TA = +25C, F = 1.0MHz)
Symbol CIN COUT CI/O Parameter(1) Input Capacitance Output Capacitance I/O Port Capacitance Conditions VIN = 0V VOUT = 0V VIN = 0V Typ. 4.5 6.5 6.5 Max. 6 8 8 Unit pF pF pF
NOTE: 1. As applicable to the device type.
NOTE: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
PIN DESCRIPTION
Pin Names xOE xDIR xAx xBx Description Output Enable Input (Active LOW) Direction Control Input Side A Inputs or 3-State Outputs(1) Side B Inputs or 3-State Outputs(1)
FUNCTION TABLE(1)
Inputs xOE L L H
NOTE: 1. H = HIGH Voltage Level L = LOW Voltage Level X = Don't Care Z = High Impedance
xDIR L H X
Outputs Bus B data to Bus A Bus A data to Bus B Z
NOTE: 1. These pins have "Bus-Hold". All other pins are standard inputs, outputs, or I/Os.
BUS-HOLD CHARACTERISTICS
Symbol IBHH IBHL IBHH IBHL IBHHO IBHLO
NOTES: 1. Pins with Bus-Hold are identified in the pin description. 2. Typical values are at VCC = 3.3V, +25C ambient.
Parameter(1) Bus-Hold Input Sustain Current Bus-Hold Input Sustain Current Bus-Hold Input Overdrive Current VCC = 3V VCC = 2.3V VCC = 3.6V
Test Conditions VI = 2V VI = 0.8V VI = 1.7V VI = 0.7V VI = 0 to 3.6V
Min. - 75 75 -- -- --
Typ.(2) -- -- -- -- --
Max. -- -- -- -- 500
Unit A A A
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IDT74LVCH32245A 3.3V CMOS 32-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS
INDUSTRIAL TEMPERATURE RANGE
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified: Operating Condition: TA = -40C to +85C
Symbol VIH VIL IIH IIL IOZH IOZL IOFF VIK VH ICCL ICCH ICCZ ICC High Impedance Output Current (3-State Output pins) Input/Output Power Off Leakage Clamp Diode Voltage Input Hysteresis Quiescent Power Supply Current VCC = 0V, VIN or VO 5.5V VCC = 2.3V, IIN = -18mA VCC = 3.3V VCC = 3.6V VIN = GND or VCC -- -- -- -- -- -- -- -0.7 100 -- -- -- 50 -1.2 -- 10 10 500 A V mV A VCC = 3.6V VO = 0 to 5.5V -- -- 10 A Parameter Input HIGH Voltage Level Input LOW Voltage Level Input Leakage Current VCC = 2.3V to 2.7V VCC = 2.7V to 3.6V VCC = 2.3V to 2.7V VCC = 2.7V to 3.6V VCC = 3.6V VI = 0 to 5.5V Test Conditions Min. 1.7 2 -- -- -- Typ.(1) -- -- -- -- -- Max. -- -- 0.7 0.8 5 A V Unit V
Quiescent Power Supply Current Variation
3.6 VIN 5.5V(2) One input at VCC - 0.6V, other inputs at VCC or GND
A
NOTES: 1. Typical values are at VCC = 3.3V, +25C ambient. 2. This applies in the disabled state only.
OUTPUT DRIVE CHARACTERISTICS
Symbol VOH Parameter Output HIGH Voltage VCC = 2.3V VCC = 2.3V VCC = 2.7V VCC = 3V VCC = 3V VOL Output LOW Voltage VCC = 2.3V to 3.6V VCC = 2.3V VCC = 2.7V VCC = 3V IOH = - 24mA IOL = 0.1mA IOL = 6mA IOL = 12mA IOL = 12mA IOL = 24mA Test Conditions(1) VCC = 2.3V to 3.6V IOH = - 0.1mA IOH = - 6mA IOH = - 12mA Min. VCC - 0.2 2 1.7 2.2 2.4 2.2 -- -- -- -- -- Max. -- -- -- -- -- -- 0.2 0.4 0.7 0.4 0.55 V Unit V
NOTE: 1. VIH and VIL must be within the min. or max. range shown in the DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE table for the appropriate VCC range. TA = - 40C to + 85C.
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IDT74LVCH32245A 3.3V CMOS 32-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS
INDUSTRIAL TEMPERATURE RANGE
OPERATING CHARACTERISTICS, VCC = 3.3V 0.3V, TA = 25C
Symbol CPD CPD Parameter Power Dissipation Capacitance per Transceiver Outputs enabled Power Dissipation Capacitance per Transceiver Outputs disabled Test Conditions CL = 0pF, f = 10Mhz Typical 76 8 Unit pF
SWITCHING CHARACTERISTICS(1)
VCC = 2.7V Symbol tPLH tPHL tPZH tPZL tPHZ tPLZ tPZH tPZL tPHZ tPLZ tSK(o) Parameter Propagation Delay xAx to xBx, xBx to xAx Output Enable Time xOE to xAx or xBx Output Disable Time xOE to xAx or xBx Output Enable Time xDIR to xAx or xBx Output Disable Time xDIR to xAx or xBx Output Skew(2) -- -- -- 500 ps 1.5 7.4 1.5 6.6 ns 1.5 7 1.5 5.5 ns 1.5 7.1 1.5 6.6 ns 1.5 6.7 1.5 5.5 ns Min. 1.5 Max. 4.7 VCC = 3.3V 0.3V Min. 1 Max. 4 Unit ns
NOTES: 1. See TEST CIRCUITS AND WAVEFORMS. TA = - 40C to + 85C. 2. Skew between any two outputs of the same package and switching in the same direction.
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IDT74LVCH32245A 3.3V CMOS 32-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS
INDUSTRIAL TEMPERATURE RANGE
VIH VT 0V VOH VT VOL VIH VT 0V
LVC Link
TEST CIRCUITS AND WAVEFORMS TEST CONDITIONS
Symbol VLOAD VIH VT VLZ VHZ CL VCC(1)= 3.3V0.3V VCC(1)= 2.7V 6 2.7 1.5 300 300 50
VCC 500 Pulse (1, 2) Generator VIN D.U.T. RT 500 CL
LVC Link
SAME PHASE INPUT TRANSITION
VCC(2)= 2.5V0.2V 2 x Vcc Vcc Vcc / 2 150 150 30
Unit V V V mV mV pF
VLOAD Open GND
tPLH OUTPUT tPLH OPPOSITE PHASE INPUT TRANSITION
tPHL
6 2.7 1.5 300 300 50
tPHL
Propagation Delay
ENABLE CONTROL INPUT tPZL OUTPUT SWITCH NORMALLY CLOSED LOW tPZH OUTPUT SWITCH NORMALLY OPEN HIGH VLOAD/2 VT tPHZ VT 0V tPLZ DISABLE VIH VT 0V VLOAD/2 VLZ VOL VOH VHZ 0V
LVC Link
VOUT
Test Circuit for All Outputs
DEFINITIONS: CL = Load capacitance: includes jig and probe capacitance. RT = Termination resistance: should be equal to ZOUT of the Pulse Generator. NOTES: 1. Pulse Generator for All Pulses: Rate 1.0MHz; tF 2.5ns; tR 2.5ns. 2. Pulse Generator for All Pulses: Rate 1.0MHz; tF 2ns; tR 2ns.
NOTE: 1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH.
Enable and Disable Times
SWITCH POSITION
Test Open Drain Disable Low Enable Low Disable High Enable High All Other Tests Switch VLOAD GND Open
DATA INPUT TIMING INPUT ASYNCHRONOUS CONTROL SYNCHRONOUS CONTROL
tSU
tH
tREM
tSU
tH
VIH VT 0V VIH VT 0V VIH VT 0V VIH VT 0V
LVC Link
INPUT
tPLH1
tPHL1
VIH VT 0V VOH VT VOL VOH VT VOL
Set-up, Hold, and Release Times
LOW-HIGH-LOW PULSE tW HIGH-LOW-HIGH PULSE VT
LVC Link
VT
OUTPUT 1
tSK (x)
tSK (x)
OUTPUT 2 tPLH2 tPHL2
Pulse Width
LVC Link
tSK(x) = tPLH2 - tPLH1 or tPHL2 - tPHL1
Output Skew - tSK(X)
NOTES: 1. For tSK(o) OUTPUT1 and OUTPUT2 are any two outputs. 2. For tSK(b) OUTPUT1 and OUTPUT2 are in the same bank.
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IDT74LVCH32245A 3.3V CMOS 32-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS
INDUSTRIAL TEMPERATURE RANGE
ORDERING INFORMATION
X LVC IDT XX Bus-Hold Temp. Range XX Family XX XXXX Device Type Package
BF 245A
Low-Profile Fine Pitch Ball Grid Array 32-bit Bus Transceiver with 5 Volt Tolerant I/O
32 H 74
32-bit Bus Density, 24mA Bus-hold -40C to +85C
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for Tech Support: logichelp@idt.com (408) 654-6459
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